Faculty Profile

Nam Sung Kim

Electrical and Computer Engineering
Nam Sung Kim
Nam Sung Kim
Associate Professor
  • Electrical and Computer Engineering
217 Coordinated Science Lab MC 228
1308 W. Main St.
Urbana Illinois 61801
(217) 244-9169

Affiliation

  • Electrical and Computer Engineering

Primary Research Area

  • Hardware systems

Education

  • B.S., Electrical Engineering, Korea Advanced Institute of Science and Technology, 1997.
  • M.S., Electrical Engineering, Korea Advanced Institute of Science and Technology, 2000.
  • Ph.D., Computer Science and Engineering, University of Michigan, Ann Arbor, 2004.

Biography

I am an associate professor at the University of Illinois, Urbana-Champaign and an IEEE Fellow. Prior to joining the University of Illinois in the fall of 2015, I was an associate professor at the University of Wisconsin, Madison where I was early-tenured in 2013. My interdisciplinary research incorporates device, circuit, architecture, and software for power-efficient computing. My research has been supported by National Science Foundation (NSF), Semiconductor Research Corporation (SRC), Defense Advanced Research Project Agency (DARPA), BAE Systems, AMD, IBM, Samsung, and Microsoft. Prior to joining the University of Wisconsin, Madison, I was a senior research scientist at Intel from 2004 to 2008, where I conducted research in power-efficient digital circuit and process architecture. I have published more than 150 refereed articles to highly-selective conferences and journals in the field of digital circuit, processor architecture, and computer-aided design. The top three most frequently cited papers have more than 3000 citations and the total number of citations of all his papers exceeds 6400. I was a recipient of the IEEE Design Automation Conference (DAC) Student Design Contest Award in 2001, Intel Fellowship in 2002, the IEEE International Symposium on Microarchitecture (MICRO) Best Paper Award in 2003, NSF CAREER Award in 2010, IBM Faculty Award in 2011 and 2012, and the University of Wisconsin Villas Associates Award in 2015. I am a member of IEEE International Symposium on High-Performance Computer Architecture (HPCA) Hall of Fame (I am the first Korean researcher in the list and a top 3 researcher in terms of the number of published paper in this conference) and IEEE International Symposium on Microarchitecture (MICRO) Hall of Fame. I earned a PhD degree in Computer Science and Engineering from the University of Michigan, Ann Arbor and Master and Bachelor degrees in Electrical Engineering from the Korea Advanced Institute of Science and Technology.

Academic Positions

  • Assistant Professor, University of Wisconsin, Madison, Electrical and Computer Engineering, Aug 2008 -- July 2013.
  • Associate Professor, University of Wisconsin, Madison, Electrical and Computer Engineering, Aug 2013-- Aug 2015.
  • Associate Professor, University of Illinois, Urbana-Champaign, Electrical and Computer Engineering, Aug 2015 -- current.

For more information

Other Professional Employment

  • Sr. Research Scientist, Intel Corporation, Hillsboro OR, May 2004 -- Apr 2007.
  • CPU Architect, Intel Corporation, Folsom CA, May 2007 -- Aug 2008.

Major Consulting Activities

  • Daegu Gyeongbuk Institute of Science and Technology, Daegu, Korea.
  • Data-Centric Computing Research Center, Suwon, Korea.
  • Advanced Micro Devices, Austin, Texas.
  • Samsung Electronics, Seoul, Korea.

Research Interests

  • Unconventional computing techniques such as bio-inspired, molecular, cellular, and analog-digital hybrid computing
  • Energy-efficient computing techniques for mobile/wearable devices and data centers
  • High-performance, energy-efficent processor, memory, storage, and system architectures

Research Areas

  • Hardware systems

Chapters in Books

  • Zhenhong Liu and Nam Sung Kim. An ultra-low-power image signal processor for smart camera applications. CISS Research Series, Book 3: Smart Camera, Springer, 2015.
  • Dongkeun Oh, Nam Sung Kim, Charlie Chung Ping Chen, and Yu Hen Hu. A mathematical method for VLSI thermal simulation at the system and circuit-levels. Recent Advancements in Modeling of Semiconductor Processes, Circuits and Chip-Level Interactions (Rasit Onur Topaloglu, Peng Li eds.), Bentham Publishing (www.ebook-engineering.org), 2009.
  • Nam Sung Kim, Todd Austin, Trevor Mudge, and D. Grunwald. Challenges for architectural level power modeling in power aware computing (R. Melhem and R. Graybill eds.). Kluwer Academic Publishers: Boston, MA, 2001.

Selected Articles in Journals

Articles in Conference Proceedings

Patents

  • Keith A Bowman, James W Tschanz, Nam Sung Kim, Janice C Lee, Christopher B Wilkerson, Shih-Lien L Lu, Tanay Karnik, and Vivek K De. Sequential circuit with error detection. Publication number: US20160034338.
  • Hao Wang and Nam Sung Kim. Shared row buffer system for asymmetric memory. Publication number: US20160335181.
  • David John Palframan, Nam Sung Kim, and Mikko Lipasti. Memory fault patching using pre-existing memory structures. Publication number: US20160103729.
  • Srinivasan Narayanamoorthy and Nam Sung Kim. Multiplication circuit providing dynamic truncation. Publication number: 20160041813.
  • Hao Wang and Nam Sung Kim. Computer architecture having selectable, parallel and serial communication channels between processors and memory. Publication number: US20150317277.
  • Ho-Young Kim, Nam-Sung Kim, and Daniel W Chang. Apparatus and method for adjusting bandwidth. Publication number: US20140325248.
  • Nam Sung Kim, James M. O'Connor, Michael J. Schulte, and Vijay Janapa Reddi. Method and apparatus for power reduction during lane divergence. Publication number: US20140068304.
  • Min Huang, Chris Wilkerson, Nam Sung Kim, and Moinuddin K. Qureshi . Method and apparatus improving performance of a digital memory array device. Publication number: US20090006742.
  • Nam Sung Kim, Muhammad M. Khellah, and Vivek De, Address hashing to help distribute accesses across portions of destructive read cache memory. Publication number: US20080162869.
  • Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim, and Vivek K. De. Memory driver circuits with embedded level shifters. Publication number: US20080080266.
  • Nam Sung Kim, Shih-Lien L. Lu, Chris Wilkerson, and Edward Grochowski. Reducing aging effect on memory. Publication number: US20070271421.
  • Nam Sung Kim. Voltage Regulator control for improved computing power efficiency. Patent number: US9547355.
  • Nam Sung Kim, Syed Gilani, and Michael Schulte. High efficiency computer floating point multiplier unit. Patent number: US9519459.
  • Nam Sung Kim. Energy-efficient multicore processor architecture for parallel processing. Patent number: US9519330.
  • Hao Wang and Nam Sung Kim. Memory controller for heterogeneous computer. Patent number: US9501227.
  • Nam Sung Kim. Signal processing circuit with multiple power modes. Patent number: US9497381.
  • Nam Sung Kim. Multiplier circuit with dynamic energy consumption adjustment. Patent number: US9323498.
  • Nam Sung Kim. Dynamic error handling for on-chip memory structures. Patent number: US9323614.
  • David John Palframan, Nam Sung Kim, and Mikko Lipasti. Method and apparatus for soft error mitigation in computers. Patent number: US9235461.
  • Nam Sung Kim. Memory-link compression for graphic processor unit. Patent number: US9189394.
  • Keith A. Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson, Shih-Lien L. Lu, Tanay Karnik, and Vivek K. De. Sequential circuit with error detection. Patent number: US9189014
  • Nam Sung Kim. Leakage power management using programmable power gating transistors and on-chip aging and temperature tracking circuit. Patent number: US8736314.
  • Nam Sung Kim and Stark C Draper. Energy efficient processor having heterogeneous cache. Patent number: US8687453.
  • Keith A. Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson, Shih-Lien L. Lu, Tanay Karnik, and Vivek K. De. Sequential circuit with error detection. Patent number: US8301970
  • Nam Sung Kim. Method and apparatus for optimizing clock speed and power dissipation in multicore architectures. Patent number: US8281164.
  • Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim, and Vivek De. Memory cell supply voltage control based on error detection. Patent number: US8006164.
  • Nam Sung Kim and Vivke De. Sleep transistor array apparatus and method with leakage control circuitry. Patent number: US7812631.
  • James W. Tschanz, Keith A. Bowman, Nam Sung Kim, Chris Wilkerson, Shih-Lien L. Lu, and Tanay Karnik. Delay fault detection using latch with error sampling. Patent number: US7653850.
  • Nam Sung Kim, Muhammad M. Khellah, Yibin Ye, Dinesh Somasekhar, and Vivek De, Memory cell bit value loss detection and restoration. Patent number: US7653846.
  • Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim, and Vivek De. Memory having bit line with resistor(s) between memory cells. Patent number: US7558097.
  • Dinesh Somasekhar, Muhammad M. Khellah, Yibin Ye, Nam Sung Kim, and Vivek K. De, Sense amplifier method and arrangement. Patent number: US7532528.
  • Fatih Hamzaoglu, Kevin Zhang, Nam Sung Kim, Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Vivek K. De, and Bo Zheng. Memory with dynamically adjustable supply. Patent number: US7403426.
  • Muhammad M. Khellah, Dinesh Somasekhar, Nam Sung Kim, Yibin Ye, Vivek K. De, Kevin Zhang, and Bo Zheng. Memory cell having P-type pass device. Patent number: US7230842.
  • Krisztian Flautner, David T. Blaauw, Trevor N. Mudge, Nam Sung Kim, and Steven M. Martin. Data processor memory circuit. Patent number: US7055007.

Honors

Teaching Honors

  • University of Illinois List of Teachers Ranked as Excellent by Their Students (Spring 2016)